// ****************************************************************************** 
// Copyright     :  Copyright (C) 2018, Hisilicon Technologies Co. Ltd.
// File name     :  prc_reg_offset_field.h
// Project line  :  K3
// Department    :  K3
// Author        :  Huawei
// Version       :  V100
// Date          :  2015/4/10
// Description   :  HiVcodecV100 VDEC
// Others        :  Generated automatically by nManager V4.2 
// History       :  Huawei 2018/04/10 10:02:42 Create file
// ******************************************************************************

#ifndef __PRC_REG_OFFSET_FIELD_H__
#define __PRC_REG_OFFSET_FIELD_H__

#define PRC_PRC_MBY_LEN    9
#define PRC_PRC_MBY_OFFSET 16
#define PRC_PRC_MBX_LEN    9
#define PRC_PRC_MBX_OFFSET 0

#define PRC_FETCH0_TOTAL_CNT_LEN    32
#define PRC_FETCH0_TOTAL_CNT_OFFSET 0

#define PRC_FETCH0_HIT_CNT_LEN    32
#define PRC_FETCH0_HIT_CNT_OFFSET 0

#define PRC_FETCH0_REQHIT_CNT_LEN    32
#define PRC_FETCH0_REQHIT_CNT_OFFSET 0

#define PRC_FETCH0_MISS_CNT_LEN    32
#define PRC_FETCH0_MISS_CNT_OFFSET 0

#define PRC_FETCH0_FE_WORK_TIME_LEN    32
#define PRC_FETCH0_FE_WORK_TIME_OFFSET 0

#define PRC_FETCH1_TOTAL_CNT_LEN    32
#define PRC_FETCH1_TOTAL_CNT_OFFSET 0

#define PRC_FETCH1_HIT_CNT_LEN    32
#define PRC_FETCH1_HIT_CNT_OFFSET 0

#define PRC_FETCH1_REQHIT_CNT_LEN    32
#define PRC_FETCH1_REQHIT_CNT_OFFSET 0

#define PRC_FETCH1_MISS_CNT_LEN    32
#define PRC_FETCH1_MISS_CNT_OFFSET 0

#define PRC_FETCH1_FE_WORK_TIME_LEN    32
#define PRC_FETCH1_FE_WORK_TIME_OFFSET 0

#define PRC_CMD_STATE_LEN         3
#define PRC_CMD_STATE_OFFSET      8
#define PRC_FETCH0_FISTATE_LEN    3
#define PRC_FETCH0_FISTATE_OFFSET 4
#define PRC_FETCH0_FESTATE_LEN    3
#define PRC_FETCH0_FESTATE_OFFSET 0

#define PRC_FETCHO_FBUFFULL_LEN          1
#define PRC_FETCHO_FBUFFULL_OFFSET       3
#define PRC_FETCHO_FESTALL_LEN           1
#define PRC_FETCHO_FESTALL_OFFSET        2
#define PRC_FETCH0_FEREQFULL_LEN         1
#define PRC_FETCH0_FEREQFULL_OFFSET      1
#define PRC_FETCH0_FBUF_VALID_FAG_LEN    1
#define PRC_FETCH0_FBUF_VALID_FAG_OFFSET 0

#define PRC_FE_INF1_8BIT_CNT_LEN     8
#define PRC_FE_INF1_8BIT_CNT_OFFSET  24
#define PRC_FE_INF0_8BIT_CNT_LEN     8
#define PRC_FE_INF0_8BIT_CNT_OFFSET  16
#define PRC_FMT_INF1_8BIT_CNT_LEN    7
#define PRC_FMT_INF1_8BIT_CNT_OFFSET 8
#define PRC_FMT_INF0_8BIT_CNT_LEN    7
#define PRC_FMT_INF0_8BIT_CNT_OFFSET 0

#define PRC_CUR_ST_2BIT_RDF_LEN     2
#define PRC_CUR_ST_2BIT_RDF_OFFSET  16
#define PRC_CUR_ST_2BIT_FMT_LEN     3
#define PRC_CUR_ST_2BIT_FMT_OFFSET  8
#define PRC_OUT_STR_2BIT_FUL_LEN    1
#define PRC_OUT_STR_2BIT_FUL_OFFSET 4
#define PRC_OUT_STR_FUL_LEN         1
#define PRC_OUT_STR_FUL_OFFSET      0

#define PRC_CUR_ST_RDF_LEN    3
#define PRC_CUR_ST_RDF_OFFSET 8
#define PRC_CUR_ST_POD_LEN    3
#define PRC_CUR_ST_POD_OFFSET 4
#define PRC_CUR_ST_FMT_LEN    3
#define PRC_CUR_ST_FMT_OFFSET 0

#define PRC_FE_INF1_2BIT_CNT_LEN     8
#define PRC_FE_INF1_2BIT_CNT_OFFSET  24
#define PRC_FE_INF0_2BIT_CNT_LEN     8
#define PRC_FE_INF0_2BIT_CNT_OFFSET  16
#define PRC_FMT_INF1_2BIT_CNT_LEN    7
#define PRC_FMT_INF1_2BIT_CNT_OFFSET 8
#define PRC_FMT_INF0_2BIT_CNT_LEN    7
#define PRC_FMT_INF0_2BIT_CNT_OFFSET 0

#define PRC_TOTAL_ABS_MVX[31:0]_LEN    32
#define PRC_TOTAL_ABS_MVX[31:0]_OFFSET 0

#define PRC_TOTAL_ABS_MVX[63:32]_LEN    32
#define PRC_TOTAL_ABS_MVX[63:32]_OFFSET 0

#define PRC_TOTAL_ABS_MVY[31:0_LEN    32
#define PRC_TOTAL_ABS_MVY[31:0_OFFSET 0

#define PRC_TOTAL_ABS_MVY[63:32]_LEN    32
#define PRC_TOTAL_ABS_MVY[63:32]_OFFSET 0

#endif // __PRC_REG_OFFSET_FIELD_H__
